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Merged Dual Explain Stage 1 Mhc 7B Fixed Gates Data V1 by tkhangg0910

By tkhangg0910 · 96 downloads
HF Repo ↗ Copy URL

Merged Dual Explain Stage 1 Mhc 7B Fixed Gates Data V1 is an open-source language model by tkhangg0910. Features: 7b LLM, VRAM: 16GB, Context: 32K, Merged, LLM Explorer Score: 0.24.

  Merged Model   Pytorch   Region:us   Sharded   Tracllava2d
Model Card on HF 🤗: https://huggingface.co/tkhangg0910/Merged-Dual-Explain-stage_1-mhc-7b-fixed_gates-data_v1 

Merged Dual Explain Stage 1 Mhc 7B Fixed Gates Data V1 Parameters and Internals

LLM NameMerged Dual Explain Stage 1 Mhc 7B Fixed Gates Data V1
Repository 🤗https://huggingface.co/tkhangg0910/Merged-Dual-Explain-stage_1-mhc-7b-fixed_gates-data_v1 
Merged ModelYes
Model Size7b
Required VRAM16 GB
Updated2026-05-23
Maintainertkhangg0910
Model TypeTracLlava2D
Model Files  4.9 GB: 1-of-4   5.0 GB: 2-of-4   5.0 GB: 3-of-4   1.1 GB: 4-of-4
Model ArchitectureTracLLava2DForCausalLM
Context Length32768
Model Max Length32768
Transformers Version4.57.6
Tokenizer ClassLlamaTokenizer
Padding Token<unk>
Vocabulary Size32002

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Note: green Score (e.g. "73.2") means that the model is better than tkhangg0910/Merged-Dual-Explain-stage_1-mhc-7b-fixed_gates-data_v1.